By Ferris Lipscomb, Ph. In this post, I would like to give some additional details about the CFP2-ACO pluggable coherent optics transceiver, which is gaining considerable interest for next generation G metro systems. At the same time, designers are pushing for smaller transceivers to increase the bandwidth density making the small size of the CFP2 form factor attractive. These two desires created a problem in that the current technology could not fit all of the necessary elements for a G coherent transceiver within either the physical size or the electrical power budget of a CFP2.

Author:Shagar Gardalkis
Country:Czech Republic
Language:English (Spanish)
Published (Last):26 June 2016
PDF File Size:6.89 Mb
ePub File Size:14.9 Mb
Price:Free* [*Free Regsitration Required]

The members of the CFP MSA have authored this document to provide an industry standard form factor for new and emerging high speed communications interfaces. Finisar Corp. Fujitsu Optical Components, Ltd. JDS Uniphase Corp. Oclaro, Inc. Sumitomo Electric Industries, Ltd. Lewis jdsu. The CFP4 module may be used to support single mode and multimode fiber optics. The CFP4 modules and the host system are hot-pluggable.

The module or the host system shall not be damaged by insertion or removal of the module. The module size has been chosen to accommodate a wide range of power dissipations and applications. Hot Pluggable is defined as permitting module plugging and unplugging with Vcc applied, with no module damage and predictable module behavior as per the State Transition Diagram.

The status reporting pins provide status reporting. Specification of the CFP4 hardware signaling pins are given in Ref. Specifications of the CFP4 hardware control pins are given in Ref. Pull-Up resistor 4.

This pin is pulled up in the CFP4 module. This pin is pulled up in the CFP4. A maximum time is defined for the transmitter turn-on process.

This pin can be optionally configured as Programmable Control 1 Pin after Reset. Please refer to Ref. Specifications of the CFP4 hardware alarm pins are given in Ref.

Pull-up should be located on the host. The intention is to allow for maximum design and debug flexibility. When asserted, it indicates received optical power in the CFP4 module is lower than the expected value.

This pin can be optionally configured as Programmable Alarm 1 Pin after Reset. Upon module initialization, these functions are available. Specifications of the CFP4 hardware management interface pins are given in Ref. Reference figures are provided regarding pin termination; see Figure and Reference figure is provided regarding pin termination; see Fig.

Host termination resistor values below Ohms are allowed, to a minimum of Ohms, but this degrades active driver performance. Host termination resistor values above Ohms are allowed but this degrades open-drain driver performance. The above drawings, with maximum host load capacitance of pF, also define the measurement set-up for module MDC timing verification. The capacitor in the drawing indicates the stray capacitance on the line. A possible example of a power supply filtering circuit that might be used on the host system is a PI C-L-C filter.

A module will meet all electrical requirements and remain fully operational in the presence of noise on the 3. The component values of power supply noise filtering circuit, such as the capacitor and inductor, must be selected such that maximum Inrush and Turn-off current does not cause voltage transients which exceed the absolute maximum power supply voltage, all specified in Table Those power classes for which the maximum current per pin exceeds mA will require agreement from an electrical connector supplier.

Figure shows the recommended termination for these circuits. Alternate signaling logic are OTL3. Lane orientation and designation is specified in the pin-map tables given in Section 5.

Loopback commands are accessed via the MDIO management interface. Recommended loopback orientation implementation is TX0 to RX0. The host loopback and the network loopback are oriented per Figure shown below. For details on controlling the loopback mode, please refer to Ref.

There is no required phase relationship between the data lanes and the reference clock, but the clock frequency shall not deviate more than specified in Table For detailed clock characteristics please refer to the below table. The monitor clock is intended to be used as a reference for measurements of the optical input or output.

Clock termination is shown in Figure Detailed clock characteristics are specified in Table The user can select the source of the Monitor clock. The cage assembly is fabricated within the host system and the CFP4 module may be inserted at a later time. Shown in Figure is a drawing of the CFP4 module and CFP4 modules inserted into a host quad-port cage system with a riding heat sink.

Shown in Figure is the module plug connector assembly which is contained as a sub-component within the CFP4 module. Shown in Figure and Figure are overview drawings of the host connector cover and the host connector assembly. These assemblies shall be built into the host system. There are four categories of pin engagement. A map of the connector engagement is shown in Figure The connector pin map engagement order is guaranteed by the physical offset built into the module plug connector.

The host connector has all contacts on the same plane without offset. The CFP4 maximum header height is specified as shown in Figure All mechanical hardware dimensions in this document are for reference only.

Normative dimensions are found in the latest published CFP4 baseline drawing. The parameters listed in Table define the CFP4 module thermal interface and may be used by host system designers to specify the host cage assembly opening and riding heat sink for optimizing host system thermal management performance. Surface flatness and roughness parameters are specified per CFP4 module power class see Table to allow for optimization of module thermal performance and cost. Non-compliance to these specifications may cause significant thermal performance degradation.

Only the top surface of the module is assumed to be used for heat transfer. A consequence of the CFP4 module being hot pluggable is that an end user be equipped to insert and extract the module in the field. The required forces are specified below in Table Cage opening and heat sink specifications vary with host system design and thermal performance requirements.

The riding heat sink illustrated in Figure is for example only. The recommended material for the heat sink is aluminum. The actual dimensions of the heat sink and cage top opening may be optimized for the particular host system. The CFP4 connector pin map orientation is shown in Figure Do Not Connect For optical waveform testing. Not for normal use. For optical waveform testing.

The CFP4 bail latch color code scheme is specified in Table Note 3: Bail latch without any color including no black bands; metal only indicates a module that does not fit into any of the defined categories. The CFP4 module should be clearly labeled. The complete labeling need not be visible when the CFP4 module is installed in the host cage assembly.

A recessed area on the bottom of the CFP4 module, as shown in Figure , is the recommended location for module label.


100GBASE-LR4 and OTU4 Dual Rate 10km Gen2 CFP2 Optical Transceiver

Kajir The c stands for the Latin letter C used to express the number centumsince the standard was primarily developed for Gigabit Ethernet systems. On the receive side, four lanes of optical data streams are optically demultiplexed by an integrated optical demultiplexer. The ACO interface can be used in coherent optics applications when the link delivers a flexible amount of bandwidth to the ms, for example when combined with FlexE. Skip to main content. Please Upgrade Your Web Browser. On the transmit side, four lanes of serial data streams are recovered, retimed, and passed on to four laser jsa, which control four electric-absorption modulated lasers EMLs with,and nm center wavelengths. C Form-factor Pluggable — Wikipedia However, as expected, improvements in technology have allowed higher performance and higher density.


CFP2-DCO Product Family



100GBASE-SR10 and OTN Multirate 100m CFP2 Optical Transceiver


LEI 11684 PDF

100G/200G+ Coherent Transceivers


Related Articles